I am Nivetha, M.Tech in VLSI and a trained Design Verification Engineer with strong knowledge in SystemVerilog, UVM, Digital Design, and AXI/APB/SPI protocols. I teach SystemVerilog, UVM testbench development, digital electronics, and VLSI fundamentals in a simple and practical way. I help engineering students and freshers understand concepts, write verification code, and prepare for VLSI interviews.